AM6x Main NavSS: SW view and McASP UDMA sequence
A brief description of the sequence of the configuration steps is given below
Setup “Proxy” to submit descriptors (this is an optional step)
Setup a RX free ring and RX completion within ring accelerator. A ring acts as HW FIFO to accept DMA transfer descriptors from the SW and pass on to the UDMA
Setup UDMA RX channel within UDMA
Pair the UDMA RX channel thread ID with McASP PDMA thread ID in the PSI-L (Packet Streaming Interface – Link) network
Setup static TR in PDMA channel for McASP
Setup McASP to receive data
Setup interrupt aggregator to receive RX packet completion event and convert to an interrupt 8. Setup interrupt router to route the interrupt to required CPU
A brief description of the sequence of steps as data flows through the SoC is given below
1. SW submits a DMA transfer descriptor to the RX free ring directly or via the “Proxy” HW
2. The descriptor is enqueue into the ring8 Migrating Applications from EDMA to UDMA using TI-RTOS
3. The descriptor is forwarded to the UDMA channel so that when data is received from McASP the data is stored at the buffer pointed to by the descriptor
4. As McASP receives data the data is sent over the PSI-L network to the “paired” UDMA channel.
5. UDMA RX channel receives the data
6. The received data is written to the buffer pointed by the previously enqueued descriptor
7. Once the complete data packet is received an event is generated over the ETL (Event Transport Lane) bus
1. The completed descriptor is written out to the RX completion queue (NOT shown in the figure)
8. The event is routed to a programmed interrupt within the interrupt aggregator
9. The interrupt aggregator route the event to the interrupt router
10. The interrupt router routes the event to the required CPU interrupt line
the figure below as example of DRU DMA transfer using UDMA
Main difference is here the descriptor is forwarded by the UDMA to the DRU (UTC) peripheral (step 4, 5).
Here the PSI-L network is used to transfer the descriptor.
The DRU then does the DMA transfer without the intervention of the UDMA (step 6).
The PSI-L network is not used for data transfer. When the DMA transfer completes the completion event is routed to the user via the ETL (step 7, 8, 9, 10)